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Of the many roads leading to successful Artemis missions, one is paved with high-tech computing chips called superchips. Along the way, a partnership between NASA wind tunnel engineers, data visualization scientists, and software developers verified a quick, cost-effective solution to improve NASA\u2019s SLS (Space Launch System) rocket for the upcoming Artemis II mission. This will be the first crewed flight of the SLS rocket and Orion spacecraft, on an approximately 10-day journey around the Moon. \u00a0<\/p>\n
A high-speed network connection between high-end computing resources at the NASA Advanced Supercomputing facility and the Unitary Plan Wind Tunnel, both located at NASA\u2019s Ames Research Center in California\u2019s Silicon Valley, is enabling a collaboration to improve the rocket for the Artemis II mission. During the Artemis I test flight, the SLS rocket experienced higher-than-expected vibrations near the solid rocket booster attach points, caused by unsteady airflow between the gap.<\/p>\n
One solution proposed for Artemis II was adding four strakes. A strake is a thin, fin-like structure commonly used on aircraft to improve unsteady airflow\u00a0and stability. Adding them to the core stage minimizes the vibration of components.<\/p>\n
The strake solution comes from previous tests in the Unitary Plan Wind Tunnel, where NASA engineers applied an Unsteady Pressure Sensitive Paint (uPSP) technique to SLS models. The paint measures changes over time in aerodynamic pressures on air and spacecraft.<\/p>\n \n