At this week’s IEEE IEDM conference, world-leading research and innovation hub for nano-electronics and digital technology, imec, reported for the first time the CMOS integration of vertically stacked gate-all-around (GAA) silicon nanowire MOSFETs. Key in the integration scheme is a dual-work-function metal gate enabling matched threshold voltages for the n- and p-type devices. Also, the impact of the new architecture on intrinsic ESD performance was studied, and an ESD protection diode is proposed. These breakthrough results advance the development of GAA nanowire MOSFETs, which promise to succeed FinFETs in future technology nodes.