International Electron Devices Meeting 2016 (IEDM) – Dec. 7, 2016 – At this week’s IEEE IEDM conference, imec, the world-leading research and innovation hub in nano-electronics and digital technologies showed for the first time a silicon (Si)-passivated germanium (Ge) nMOS gate stack with dramatically reduced interface defect density (DIT) reaching the same level as a Si gate stack and with high mobility and reduced positive bias temperature instability (PBTI). These promising results pave the way to Ge-based finFETs and gate all-around devices, as promising options for 5nm and beyond logic devices.