At this week’s 2017 International Electron Devices Meeting (IEDM), imec, the research and innovation hub in nano-electronics and digital technology, reports on multiple key process optimizations for vertically stacked gate-all-around (GAA) silicon nanowire transistors. The optimized CMOS process flow was then used to integrate, for the first time, the GAA nanowire transistors in a functional ring oscillator. This demonstrator shows the enormous promise this technology holds for realizing the sub-5nm technology nodes.